October 2025 - TF-A - lists.trustedfirmware.org

Trusted Firmware-A LTS v2.12.8 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.12.8 is now available. This release contains the following patches: 776781d6d fix(simd): fix base register in fpregs_context_* [1] 0dba1a220 fix(cpus): workaround for Cortex-A720 erratum 3711910 [2] 6cce5175f fix(cpus): workaround for Cortex-A720 erratum 2729604 [3] ccb421921 refactor: fix workaround order for Cortex-A720 [4] 200fa2012 fix(spm-mm): prevent excessive racing [5] [1] https://review.trustedfirmware.org/q/I757a26f8910c2ab648116e001e06baa3deb2e… [2] https://review.trustedfirmware.org/q/Id65d5ba41b96648b07c09df77fb25cc4bdb50… [3] https://review.trustedfirmware.org/q/I4567d75ba9f17146d0d7bc5cdb622bb63efad… [4] https://review.trustedfirmware.org/q/I6770567a9580973ceedb5911f0a495391ef9e… [5] https://review.trustedfirmware.org/q/I0861d04ed95437e4ca9f203d9e79a6296b1ea… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.12.8/change-log.html Thanks, TF-A LTS team

1 week, 3 days

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 4 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 4 of 4 defect(s) ** CID 491156: (DEADCODE) /drivers/st/usb_dwc3/usb_dwc3.c: 1741 in dwc3_handle_dev_event() /drivers/st/usb_dwc3/usb_dwc3.c: 1724 in dwc3_handle_dev_event() /drivers/st/usb_dwc3/usb_dwc3.c: 1718 in dwc3_handle_dev_event() _____________________________________________________________________________________________ *** CID 491156: (DEADCODE) /drivers/st/usb_dwc3/usb_dwc3.c: 1741 in dwc3_handle_dev_event() 1735 return action; 1736 } 1737 } 1738 1739 /* Clear Stall for all EP except EP0OUT k = USB_DWC3_NUM_OUT_EP */ 1740 for (i = 1; i < USB_DWC3_NUM_OUT_EP; i++) { >>> CID 491156: (DEADCODE) >>> Execution cannot reach this statement: "ep = &dwc3_handle->OUT_ep[i];". 1741 ep = &dwc3_handle->OUT_ep[i]; 1742 1743 if (!ep->is_stall) { 1744 continue; 1745 } 1746 /drivers/st/usb_dwc3/usb_dwc3.c: 1724 in dwc3_handle_dev_event() 1718 dwc3_ep_stop_xfer(dwc3_handle, 1719 &dwc3_handle->pcd_handle->out_ep[i]); 1720 } 1721 1722 /* Clear Stall for all EP except EP0IN k = USB_DWC3_NUM_IN_EP */ 1723 for (i = 1; i < USB_DWC3_NUM_IN_EP; i++) { >>> CID 491156: (DEADCODE) >>> Execution cannot reach this statement: "ep = &dwc3_handle->IN_ep[i];". 1724 ep = &dwc3_handle->IN_ep[i]; 1725 1726 if (!ep->is_stall) { 1727 continue; 1728 } 1729 /drivers/st/usb_dwc3/usb_dwc3.c: 1718 in dwc3_handle_dev_event() 1712 dwc3_ep_stop_xfer(dwc3_handle, 1713 &dwc3_handle->pcd_handle->in_ep[i]); 1714 } 1715 1716 /* Stop transfers for all EP except EP0OUT k = USB_DWC3_NUM_OUT_EP */ 1717 for (i = 1; i < USB_DWC3_NUM_OUT_EP; i++) { >>> CID 491156: (DEADCODE) >>> Execution cannot reach this statement: "dwc3_ep_stop_xfer(dwc3_hand...". 1718 dwc3_ep_stop_xfer(dwc3_handle, 1719 &dwc3_handle->pcd_handle->out_ep[i]); 1720 } 1721 1722 /* Clear Stall for all EP except EP0IN k = USB_DWC3_NUM_IN_EP */ 1723 for (i = 1; i < USB_DWC3_NUM_IN_EP; i++) { ** CID 491155: API usage errors (PW.PRINTF_ARG_MISMATCH) /drivers/st/usb_dwc3/usb_dwc3.c: 698 in () _____________________________________________________________________________________________ *** CID 491155: API usage errors (PW.PRINTF_ARG_MISMATCH) /drivers/st/usb_dwc3/usb_dwc3.c: 698 in () 692 } 693 return USBD_OK; 694 } 695 696 /* Can be called from interrupt context hence cannot wait for Tick */ 697 if (timeout_elapsed(timeout)) { >>> CID 491155: API usage errors (PW.PRINTF_ARG_MISMATCH) >>> argument is incompatible with corresponding format string conversion (expected type "unsigned long" but argument has type "int") 698 ERROR("TIMEOUT Command Complete --> %u PHYEP%lu %x\n", 699 DWC3_DEPCMD_STATUS(reg), phy_epnum, reg); 700 /* "Command Timed Out" */ 701 return USBD_TIMEOUT; 702 } 703 } while (true); ** CID 491154: Integer handling issues (CONSTANT_EXPRESSION_RESULT) /drivers/st/usb_dwc3/usb_dwc3.c: 2341 in usb_dwc3_init_driver() _____________________________________________________________________________________________ *** CID 491154: Integer handling issues (CONSTANT_EXPRESSION_RESULT) /drivers/st/usb_dwc3/usb_dwc3.c: 2341 in usb_dwc3_init_driver() 2335 /* 2336 * We are doing 1:1 alternate mapping for endpoints, meaning 2337 * IN Endpoint X maps to Physical Endpoint 2*X +1 and 2338 * OUT Endpoint X maps to Physical Endpoint 2*X. 2339 * So USB endpoint 0x81 is 0x03. 2340 */ >>> CID 491154: Integer handling issues (CONSTANT_EXPRESSION_RESULT) >>> "(i | (128UL /* (uint64_t)1ULL << 7 */)) & (128UL /* (uint64_t)1ULL << 7 */)" is always 0x80 regardless of the values of its operands. This occurs as a value. 2341 dwc3_handle->IN_ep[i].phy_epnum = __HAL_PCD_EPADDR_TO_PHYEPNUM(i | EP_DIR_IN); 2342 2343 dwc3_handle->IN_ep[i].intr_num = PCD_DEV_EVENTS_INTR; 2344 } 2345 2346 for (i = 0; i < USB_DWC3_NUM_OUT_EP ; i++) { ** CID 491153: (UNINIT) _____________________________________________________________________________________________ *** CID 491153: (UNINIT) /plat/nxp/soc-ls1046a/soc.c: 299 in soc_mem_access() 293 dram_idx, index, 294 info_dram_regions->region[dram_idx].addr, 295 info_dram_regions->region[dram_idx].size, 296 NXP_SECURE_DRAM_SIZE, NXP_SP_SHRD_DRAM_SIZE); 297 } 298 >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 299 mem_access_setup(NXP_TZC_ADDR, index, tzc400_reg_list); 300 } 301 302 #else /* IMAGE_BL2 */ 303 /* Functions for BL31 */ 304 /plat/nxp/soc-lx2160a/soc.c: 409 in soc_mem_access() 403 tzc400_reg_list); 404 mem_access_setup(NXP_TZC3_ADDR, index, 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) { 408 INFO("DDR Controller 2.\n"); >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 409 mem_access_setup(NXP_TZC2_ADDR, index, 410 tzc400_reg_list); 411 mem_access_setup(NXP_TZC4_ADDR, index, 412 tzc400_reg_list); 413 } 414 } /plat/nxp/soc-lx2160a/soc.c: 411 in soc_mem_access() 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) { 408 INFO("DDR Controller 2.\n"); 409 mem_access_setup(NXP_TZC2_ADDR, index, 410 tzc400_reg_list); >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 411 mem_access_setup(NXP_TZC4_ADDR, index, 412 tzc400_reg_list); 413 } 414 } 415 416 #else /plat/nxp/soc-ls1088a/soc.c: 222 in soc_mem_access() 216 dram_idx, index, 217 info_dram_regions->region[dram_idx].addr, 218 info_dram_regions->region[dram_idx].size, 219 NXP_SECURE_DRAM_SIZE, NXP_SP_SHRD_DRAM_SIZE); 220 } 221 >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 222 mem_access_setup(NXP_TZC_ADDR, index, 223 tzc400_reg_list); 224 } 225 226 /* 227 * This function implements soc specific erratum /plat/nxp/soc-lx2160a/soc.c: 404 in soc_mem_access() 398 } 399 400 if (devdisr5_info->ddrc1_present != 0) { 401 INFO("DDR Controller 1.\n"); 402 mem_access_setup(NXP_TZC_ADDR, index, 403 tzc400_reg_list); >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 404 mem_access_setup(NXP_TZC3_ADDR, index, 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) { 408 INFO("DDR Controller 2.\n"); 409 mem_access_setup(NXP_TZC2_ADDR, index, /plat/nxp/soc-lx2160a/soc.c: 402 in soc_mem_access() 396 info_dram_regions->region[dram_idx].size, 397 NXP_SECURE_DRAM_SIZE, NXP_SP_SHRD_DRAM_SIZE); 398 } 399 400 if (devdisr5_info->ddrc1_present != 0) { 401 INFO("DDR Controller 1.\n"); >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 402 mem_access_setup(NXP_TZC_ADDR, index, 403 tzc400_reg_list); 404 mem_access_setup(NXP_TZC3_ADDR, index, 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) { ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

1 week, 3 days

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TF-A Tech Forum on Thu Oct 30th 2025 4.00pm UK

by Olivier Deprez

(re-sending as it seems this email did not properly reach the ML) Hi, On Oct 30th in the TF-A Tech Forum, two different sessions of 30 minutes each will be presented: TF-A SMC fuzzer improvements - Slava Andrianov * Motivating secure world fuzzing * Fuzzer configuration improvements * Future fuzzing work TF-RMM ID registers management - Sona Rebecca Mathew * Earlier RMM directly read ID registers, creating a dependency on EL3 revisions to enable features forcing a version compatibility between the two. * New approach: EL3 capabilities are queried via an SMC call and RMM now uses cached ID register copies populated at cold boot. Includes forward-looking support for FEAT_IDTE3 in TF-A. Regards, Olivier. TF-A Tech Forum Thursday Oct 30, 2025 ⋅ 5pm – 6pm (Central European Time - Paris) Trusted Firmware is inviting you to a scheduled Zoom meeting. Please download and import the following iCalendar (.ics) files to your calendar system. Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Join Zoom Meeting https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… Meeting ID: 935 5786 3987 Passcode: 939141 --- One tap mobile +12532158782,,93557863987# US (Tacoma) +13017158592,,93557863987# US (Washington DC) --- Dial by your location • +1 253 215 8782 US (Tacoma) • +1 301 715 8592 US (Washington DC) • +1 305 224 1968 US • +1 309 205 3325 US • +1 312 626 6799 US (Chicago) • +1 346 248 7799 US (Houston) • +1 360 209 5623 US • +1 386 347 5053 US • +1 507 473 4847 US • +1 564 217 2000 US • +1 646 558 8656 US (New York) • +1 646 931 3860 US • +1 669 444 9171 US • +1 669 900 9128 US (San Jose) • +1 689 278 1000 US • +1 719 359 4580 US • +1 253 205 0468 US • 833 548 0276 US Toll-free • 833 548 0282 US Toll-free • 833 928 4608 US Toll-free • 833 928 4609 US Toll-free • 833 928 4610 US Toll-free • 877 853 5247 US Toll-free • 888 788 0099 US Toll-free Meeting ID: 935 5786 3987 Find your local number: https://linaro-org.zoom.us/u/adoz9mILli

1 week, 4 days

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TF-A Tech Forum on Thu Oct 30th 2025 4.00pm UK

by Olivier Deprez

Hi, On Oct 30th in the TF-A Tech Forum, two different sessions of 30 minutes each will be presented: TF-A SMC fuzzer improvements - Slava Andrianov * Motivating secure world fuzzing * Fuzzer configuration improvements * Future fuzzing work TF-RMM ID registers management - Sona Rebecca Mathew * Earlier RMM directly read ID registers, creating a dependency on EL3 revisions to enable features forcing a version compatibility between the two. * New approach: EL3 capabilities are queried via an SMC call and RMM now uses cached ID register copies populated at cold boot. Includes forward-looking support for FEAT_IDTE3 in TF-A. Regards, Olivier. TF-A Tech Forum Thursday Oct 30, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com

1 week, 6 days

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Marvell a3700 build failure after toolchain update

by Jayanth Dodderi Chidanand

Hi All, During the TF-A CI upgrade from Arm GNU Toolchain version 14.2.Rel1 to 14.3.Rel1 [1], the Marvell A3700 platform build began failing. Since TF-A does not include the WTMI sources and there has been no response from the Marvell maintainers, the platform has been temporarily removed from the CI [2]. We will restore it once the fix lands in the Marvell upstream and links cleanly with 14.3/binutils 2.44. The sections below outline the CI environment, build configuration, and error details for reference. * Test config tf-l1-build-plat/a3700-default:nil * * CI Test Environment Host: Ubuntu 22.04 (Docker) Toolchains: aarch64-none-elf: Arm GNU 14.3.Rel1 arm-none-eabi (CM3/WTMI): Arm GNU 14.3.Rel1 (fails); passes with 14.2.Rel1 * Representative build params: make CROSS_COMPILE=aarch64-none-elf- CROSS_CM3=arm-none-eabi- PLAT=a3700 BL33=/dev/null CM3_SYSTEM_RESET=1 A3720_DB_PM_WAKEUP_SRC=1 CLOCKSPRESET=CPU_1000_DDR_800 DDR_TOPOLOGY=5 DEBUG=1 V=1 * Build Failure: (*ABS*0x1fff0000): Unknown destination type (ARM/Thumb) in main.o (.text.startup+0x2a): dangerous relocation: unsupported relocation /home/../.../arm-none-eabi/bin/ld: warning: build/sys_init.elf has a LOAD segment with RWX permissions /home/../.../arm-none-eabi/bin/ld: (*ABS*0x1fff0000): Unknown destination type (ARM/Thumb) in main.o main.o: in function `main': .../A3700-utils-marvell/wtmi/sys_init/main.c:350:(.text.startup+0x2a): dangerous relocation: unsupported relocation collect2: error: ld returned 1 exit status Root Cause On Cortex-M (Thumb-only), calls/jumps to absolute addresses must have bit0 = 1 to indicate Thumb state. Older binutils tolerated raw addresses like 0x1FFF0000; binutils 2.44 now errors if the destination state is unknown (no stub is inserted). Requested fix (in WTMI sources) Please update any absolute branch/call targets to be explicitly Thumb (LSB=1), or define a Thumb symbol and call that. Acceptance criteria: WTMI links cleanly with arm-none-eabi 14.3.Rel1 (binutils 2.44) with no: * Unknown destination type (ARM/Thumb) * dangerous relocation: unsupported relocation [1] https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads [2] https://review.trustedfirmware.org/c/ci/tf-a-ci-scripts/+/44444/5 Thanks & regards, Jayanth

1 week, 6 days

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Canceled event with note: TF-A Tech Forum @ Thu Nov 13, 2025 5pm - 6pm (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Cancelling the Nov 13th instance." TF-A Tech Forum Thursday Nov 13, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

2 weeks, 5 days

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Trusted Firmware-A LTS v2.12.7 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.12.7 is now available. This release contains the following patches: 7a241814b fix(smccc): cleanup unused declaration [1] 616a7983d fix(cpus): inform the compiler that struct cpu_ops is aligned [2] 01d80d085 docs(security): update Advisory TFV-6 [3] 79ba33aa3 fix(cpus): use correct Makefile indentation for CVE-2018-3639 check [4] 84e8bc22f build(allwinner): disable unneeded CVE workarounds and MPAM [5] 9cb5a78aa fix(aarch32): make get_cpu_ops_ptr() PCS compliant [6] 7c300227e fix(cpus): workaround for Cortex-A510 erratum 2008766 [7] 4e62dbf9b fix(cpus): workaround for Cortex-A510 erratum 2169012 [8] 399477f9f fix(cpus): workaround for Cortex-A510 erratum 2218134 [9] 05f71e344 fix(cpus): workaround for Cortex-A510 erratum 2420992 [10] 8c67b1a27 fix(cpus): workaround for Cortex-A510 erratum 3672349 [11] 1f547e228 fix(cpus): workaround for Cortex-A510 erratum 3704847 [12] e26cd2c52 fix(cpus): workaround for Neoverse-V2 erratum 3841324 [13] 72f26f182 fix(cpus): workaround for Neoverse-V2 erratum 3701771 [14] [1] https://review.trustedfirmware.org/q/Iae81e0bcbd2feb2b72a4e4e8fd27a27ae00c9… [2] https://review.trustedfirmware.org/q/Id38d6f1b92527b8a414cfbb856a5a82c76a1b… [3] https://review.trustedfirmware.org/q/Icb3d039c8949fd6036c729a845646170710ba… [4] https://review.trustedfirmware.org/q/Ieb56af33a11c40b6753738669eee929c26426… [5] https://review.trustedfirmware.org/q/Ibc52a4fc9b8f5d9b2b28a2ce13d3ab99b63e9… [6] https://review.trustedfirmware.org/q/I7f3b50e56a1288d2a8136a7b8c01544bab19c… [7] https://review.trustedfirmware.org/q/Id1aa0f2c518a055363c962f9abdb27e1ee8bf… [8] https://review.trustedfirmware.org/q/Ifdd59c09e84252dc292600630d81d32986fd6… [9] https://review.trustedfirmware.org/q/Ifec40dee2f7e42c56c9ed447b6b1997b170f9… [10] https://review.trustedfirmware.org/q/Ia76ba2431d76f14c08b95a998806986190d68… [11] https://review.trustedfirmware.org/q/I9786ab8843a2eab45e650c6af50b693348152… [12] https://review.trustedfirmware.org/q/I2c7c8da9c66471115b5bf8fb5c87d4de46ca2… [13] https://review.trustedfirmware.org/q/I9b3a5266103e5000d207c7a270c65455d0646… [14] https://review.trustedfirmware.org/q/Ic0ad68f7bd393bdc03343d5ba815adb23bf6a… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.12.7/change-log.html Thanks, TF-A LTS team

3 weeks, 3 days

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Deprecating SPM-MM

by Olivier Deprez

Hi, In light of coming TF-A v2.14 in November, we would like to mark the SPM-MM implementation [1] as deprecated. Our understanding is that it's not longer very actively used at least from an upstream perspective, while most SPM sw architecures have adopted/migrated to the FF-A standard [2] [3]. The intent would be to remove this implementation completely from next release in May 26 onwards. This would remove the maintenance burden for 3 orthogonal options, reducing to the 2 FF-A compliant implementations. Simplification also comes to the testing side and CI. The SPM-MM implementation would continue to be supported in LTS branches maintained for 7 years. Let us know if this causes major concerns. Thanks, Regards, Olivier. [1] https://trustedfirmware-a.readthedocs.io/en/latest/components/secure-partit… [2] https://trustedfirmware-a.readthedocs.io/en/latest/components/secure-partit… [3] https://trustedfirmware-a.readthedocs.io/en/latest/components/el3-spmc.html

3 weeks, 3 days

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Firmware-A v2.13 release code freeze notification

by Olivier Deprez

Hi All, The next release of the Firmware-A bundle of projects tagged v2.13 has an expected code freeze date of May, 2nd 2025. In order to accommodate the Linaro connect event occurring during the week of May 12th we may extend the release completion date up until the week of May 26th. v2.13 release preparation tasks start from now. We want to ensure that planned feature patches for the release are submitted in good time for the review process to conclude. As a kind recommendation and a matter of sharing CI resources, please launch CI jobs with care e.g.: -For simple platform, docs changes, or one liners, use Allow-CI+1 label (no need for a full Allow-CI+2 run). -For large patch stacks use Allow-CI+2 at top of the patch stack (and if required few individual Allow+CI+1 labels in the middle of the patch stack). -Carefully analyze results and fix the change if required, before launching new jobs on the same change. -If after issuing a Allow-CI+1 or Allow-CI+2 label a Build start notice is not added as a gerrit comment on the patch right away please be patient as under heavy load CI jobs can be queued and in extreme conditions it can be over an hour before the Build start notice is issued. Issuing another Allow-CI+1 or Allow-CI+2 label will just result in an additional job being queued. Regards, Olivier.

4 weeks

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Trusted Firmware-A LTS v2.8.39 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.8.39 is now available. This release contains the following patches: 8d101b32e fix(cpus): workaround for Cortex-A720 erratum 3711910 [1] 7e9945ac3 fix(cpus): workaround for Cortex-A720 erratum 2729604 [2] 8ba721842 refactor: fix workaround order for Cortex-A720 [3] [1] https://review.trustedfirmware.org/q/Id65d5ba41b96648b07c09df77fb25cc4bdb50… [2] https://review.trustedfirmware.org/q/I4567d75ba9f17146d0d7bc5cdb622bb63efad… [3] https://review.trustedfirmware.org/q/I6770567a9580973ceedb5911f0a495391ef9e… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.39/change-log.html Thanks, TF-A LTS team

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TF-A October 2025