Hi,
We use TF-A v2.5 with ENABLE_SVE_FOR_NS=1 and SPM_MM=1 and boot linux kernel is ok. Atfer upgrade TF-A with patch fix(spm_mm): do not compile if SVE/SME is enabled (4333f95bedb), we set ENABLE_SVE_FOR_NS=0 to fix compile error, but we get exception and hang in EL3 when boot kernel: ----------------------------------------------------------------------------------- [ 0.000000] Linux version 5.10.23-003debug.ali5000.alios7.aarch64 (root@j66e01291.sqa.eu95) (gcc (GCC) 10.2.1 20200825 (Alibaba 10.2.1-3 2.17) ...... [ 0.000000] pcpu-alloc: [1] 80 [1] 81 [1] 82 [1] 83 [1] 84 [1] 85 [1] 86 [1] 87 [ 0.000000] pcpu-alloc: [1] 88 [1] 89 [1] 90 [1] 91 [1] 92 [1] 93 [1] 94 [1] 95 ERROR: Excepton received on 0x81000000, spsr_el3:89,reason:1 esr_el3:0x66000000 Exception Class = 19: Access to SVE functionality trapped as a result of CPACR_EL1.ZEN,CPTR_EL2.ZEN, CPTR_EL2.TZ, or CPTR_EL3.EZ. ----------------------------------------------------------------------------------- How to fix the exception issue? Can we remove the below lines? ifeq (${ENABLE_SVE_FOR_NS},1) $(error "Error: SPM_MM is not compatible with ENABLE_SVE_FOR_NS") endif
Regards, Ming Huang
Hi Ming
It sounds like you're trying to use SPM-MM on SVE-enabled hardware with a normal world payload that uses SVE. Is that correct?
The current SPM-MM code does not support saving/restoring SVE registers, which is why you're seeing the compilation error. The patch you refer to intends to catch unsafe configurations. If you're 100% sure that your StMM payload is: a) not using FP&SIMD or SVE registers, or b) takes care of saving/restoring SVE registers itself...
... then it may be safe to remove that compilation check you refer to, while leaving ENABLE_SVE_FOR_NS=1. But if your StMM payload uses FP&SIMD or SVE registers then you may see an EL3 exception.
We are currently working on improving this code. Please let us know if you are using StMM payloads that use FP&SIMD or SVE (together with normal world SVE payloads). It helps us to know what configs users need, since some configs require more enablement work.
Regards
Dan.
-----Original Message----- From: Ming Huang via TF-A tf-a@lists.trustedfirmware.org Sent: 05 May 2022 10:41 To: tf-a@lists.trustedfirmware.org; Manish Pandey2 Manish.Pandey2@arm.com Subject: [TF-A] About SVE issue
Hi,
We use TF-A v2.5 with ENABLE_SVE_FOR_NS=1 and SPM_MM=1 and boot linux kernel is ok. Atfer upgrade TF-A with patch fix(spm_mm): do not compile if SVE/SME is enabled (4333f95bedb), we set ENABLE_SVE_FOR_NS=0 to fix compile error, but we get exception and hang in EL3 when boot kernel:
[ 0.000000] Linux version 5.10.23-003debug.ali5000.alios7.aarch64 (root@j66e01291.sqa.eu95) (gcc (GCC) 10.2.1 20200825 (Alibaba 10.2.1-3 2.17) ...... [ 0.000000] pcpu-alloc: [1] 80 [1] 81 [1] 82 [1] 83 [1] 84 [1] 85 [1] 86 [1] 87 [ 0.000000] pcpu-alloc: [1] 88 [1] 89 [1] 90 [1] 91 [1] 92 [1] 93 [1] 94 [1] 95 ERROR: Excepton received on 0x81000000, spsr_el3:89,reason:1 esr_el3:0x66000000 Exception Class = 19: Access to SVE functionality trapped as a result of CPACR_EL1.ZEN,CPTR_EL2.ZEN, CPTR_EL2.TZ, or CPTR_EL3.EZ.
How to fix the exception issue? Can we remove the below lines? ifeq (${ENABLE_SVE_FOR_NS},1) $(error "Error: SPM_MM is not compatible with ENABLE_SVE_FOR_NS") endif
Regards, Ming Huang -- TF-A mailing list -- tf-a@lists.trustedfirmware.org To unsubscribe send an email to tf-a-leave@lists.trustedfirmware.org
Hi Dan,
There are two image from bl31: 1. bl32(run at secure EL0), compile from edk2 StandaloneMmPkg.This image is for RAS. This is a StMM payload. As bl32 worked correctly for a long time, I think that bl32 is not using FP&SIMD or SVE registers. 2. bl33(run at non-seucre EL2), this is uefi image,using for boot linux kernel. I think bl33 is not a StMM payload and linux kernel is not a StMM payload.
So only bl32 is StMM payload of TF-A, option SPM-MM=1 is need for bl32, option ENABLE_SVE_FOR_NS=1 is need for linux kernel.
I removed that compilation check and it work correctly for now.
Regards,
Ming Huang
在 5/5/22 7:16 PM, Dan Handley via TF-A 写道:
Hi Ming
It sounds like you're trying to use SPM-MM on SVE-enabled hardware with a normal world payload that uses SVE. Is that correct?
The current SPM-MM code does not support saving/restoring SVE registers, which is why you're seeing the compilation error. The patch you refer to intends to catch unsafe configurations. If you're 100% sure that your StMM payload is: a) not using FP&SIMD or SVE registers, or b) takes care of saving/restoring SVE registers itself...
... then it may be safe to remove that compilation check you refer to, while leaving ENABLE_SVE_FOR_NS=1. But if your StMM payload uses FP&SIMD or SVE registers then you may see an EL3 exception.
We are currently working on improving this code. Please let us know if you are using StMM payloads that use FP&SIMD or SVE (together with normal world SVE payloads). It helps us to know what configs users need, since some configs require more enablement work.
Regards
Dan.
-----Original Message----- From: Ming Huang via TF-A tf-a@lists.trustedfirmware.org Sent: 05 May 2022 10:41 To: tf-a@lists.trustedfirmware.org; Manish Pandey2 Manish.Pandey2@arm.com Subject: [TF-A] About SVE issue
Hi,
We use TF-A v2.5 with ENABLE_SVE_FOR_NS=1 and SPM_MM=1 and boot linux kernel is ok. Atfer upgrade TF-A with patch fix(spm_mm): do not compile if SVE/SME is enabled (4333f95bedb), we set ENABLE_SVE_FOR_NS=0 to fix compile error, but we get exception and hang in EL3 when boot kernel:
[ 0.000000] Linux version 5.10.23-003debug.ali5000.alios7.aarch64 (root@j66e01291.sqa.eu95) (gcc (GCC) 10.2.1 20200825 (Alibaba 10.2.1-3 2.17) ...... [ 0.000000] pcpu-alloc: [1] 80 [1] 81 [1] 82 [1] 83 [1] 84 [1] 85 [1] 86 [1] 87 [ 0.000000] pcpu-alloc: [1] 88 [1] 89 [1] 90 [1] 91 [1] 92 [1] 93 [1] 94 [1] 95 ERROR: Excepton received on 0x81000000, spsr_el3:89,reason:1 esr_el3:0x66000000 Exception Class = 19: Access to SVE functionality trapped as a result of CPACR_EL1.ZEN,CPTR_EL2.ZEN, CPTR_EL2.TZ, or CPTR_EL3.EZ.
How to fix the exception issue? Can we remove the below lines? ifeq (${ENABLE_SVE_FOR_NS},1) $(error "Error: SPM_MM is not compatible with ENABLE_SVE_FOR_NS") endif
Regards, Ming Huang -- TF-A mailing list -- tf-a@lists.trustedfirmware.org To unsubscribe send an email to tf-a-leave@lists.trustedfirmware.org
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Ming Huang