Hi,
Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan.
4 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan.
New defect(s) Reported-by: Coverity Scan Showing 4 of 4 defect(s)
** CID 491156: (DEADCODE) /drivers/st/usb_dwc3/usb_dwc3.c: 1741 in dwc3_handle_dev_event() /drivers/st/usb_dwc3/usb_dwc3.c: 1724 in dwc3_handle_dev_event() /drivers/st/usb_dwc3/usb_dwc3.c: 1718 in dwc3_handle_dev_event()
_____________________________________________________________________________________________ *** CID 491156: (DEADCODE) /drivers/st/usb_dwc3/usb_dwc3.c: 1741 in dwc3_handle_dev_event() 1735 return action; 1736 } 1737 } 1738 1739 /* Clear Stall for all EP except EP0OUT k = USB_DWC3_NUM_OUT_EP */ 1740 for (i = 1; i < USB_DWC3_NUM_OUT_EP; i++) {
CID 491156: (DEADCODE) Execution cannot reach this statement: "ep = &dwc3_handle->OUT_ep[i];".
1741 ep = &dwc3_handle->OUT_ep[i]; 1742 1743 if (!ep->is_stall) { 1744 continue; 1745 } 1746 /drivers/st/usb_dwc3/usb_dwc3.c: 1724 in dwc3_handle_dev_event() 1718 dwc3_ep_stop_xfer(dwc3_handle, 1719 &dwc3_handle->pcd_handle->out_ep[i]); 1720 } 1721 1722 /* Clear Stall for all EP except EP0IN k = USB_DWC3_NUM_IN_EP */ 1723 for (i = 1; i < USB_DWC3_NUM_IN_EP; i++) {
CID 491156: (DEADCODE) Execution cannot reach this statement: "ep = &dwc3_handle->IN_ep[i];".
1724 ep = &dwc3_handle->IN_ep[i]; 1725 1726 if (!ep->is_stall) { 1727 continue; 1728 } 1729 /drivers/st/usb_dwc3/usb_dwc3.c: 1718 in dwc3_handle_dev_event() 1712 dwc3_ep_stop_xfer(dwc3_handle, 1713 &dwc3_handle->pcd_handle->in_ep[i]); 1714 } 1715 1716 /* Stop transfers for all EP except EP0OUT k = USB_DWC3_NUM_OUT_EP */ 1717 for (i = 1; i < USB_DWC3_NUM_OUT_EP; i++) {
CID 491156: (DEADCODE) Execution cannot reach this statement: "dwc3_ep_stop_xfer(dwc3_hand...".
1718 dwc3_ep_stop_xfer(dwc3_handle, 1719 &dwc3_handle->pcd_handle->out_ep[i]); 1720 } 1721 1722 /* Clear Stall for all EP except EP0IN k = USB_DWC3_NUM_IN_EP */ 1723 for (i = 1; i < USB_DWC3_NUM_IN_EP; i++) {
** CID 491155: API usage errors (PW.PRINTF_ARG_MISMATCH) /drivers/st/usb_dwc3/usb_dwc3.c: 698 in ()
_____________________________________________________________________________________________ *** CID 491155: API usage errors (PW.PRINTF_ARG_MISMATCH) /drivers/st/usb_dwc3/usb_dwc3.c: 698 in () 692 } 693 return USBD_OK; 694 } 695 696 /* Can be called from interrupt context hence cannot wait for Tick */ 697 if (timeout_elapsed(timeout)) {
CID 491155: API usage errors (PW.PRINTF_ARG_MISMATCH) argument is incompatible with corresponding format string conversion (expected type "unsigned long" but argument has type "int")
698 ERROR("TIMEOUT Command Complete --> %u PHYEP%lu %x\n", 699 DWC3_DEPCMD_STATUS(reg), phy_epnum, reg); 700 /* "Command Timed Out" */ 701 return USBD_TIMEOUT; 702 } 703 } while (true);
** CID 491154: Integer handling issues (CONSTANT_EXPRESSION_RESULT) /drivers/st/usb_dwc3/usb_dwc3.c: 2341 in usb_dwc3_init_driver()
_____________________________________________________________________________________________ *** CID 491154: Integer handling issues (CONSTANT_EXPRESSION_RESULT) /drivers/st/usb_dwc3/usb_dwc3.c: 2341 in usb_dwc3_init_driver() 2335 /* 2336 * We are doing 1:1 alternate mapping for endpoints, meaning 2337 * IN Endpoint X maps to Physical Endpoint 2*X +1 and 2338 * OUT Endpoint X maps to Physical Endpoint 2*X. 2339 * So USB endpoint 0x81 is 0x03. 2340 */
CID 491154: Integer handling issues (CONSTANT_EXPRESSION_RESULT) "(i | (128UL /* (uint64_t)1ULL << 7 */)) & (128UL /* (uint64_t)1ULL << 7 */)" is always 0x80 regardless of the values of its operands. This occurs as a value.
2341 dwc3_handle->IN_ep[i].phy_epnum = __HAL_PCD_EPADDR_TO_PHYEPNUM(i | EP_DIR_IN); 2342 2343 dwc3_handle->IN_ep[i].intr_num = PCD_DEV_EVENTS_INTR; 2344 } 2345 2346 for (i = 0; i < USB_DWC3_NUM_OUT_EP ; i++) {
** CID 491153: (UNINIT)
_____________________________________________________________________________________________ *** CID 491153: (UNINIT) /plat/nxp/soc-ls1046a/soc.c: 299 in soc_mem_access() 293 dram_idx, index, 294 info_dram_regions->region[dram_idx].addr, 295 info_dram_regions->region[dram_idx].size, 296 NXP_SECURE_DRAM_SIZE, NXP_SP_SHRD_DRAM_SIZE); 297 } 298
CID 491153: (UNINIT) Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup".
299 mem_access_setup(NXP_TZC_ADDR, index, tzc400_reg_list); 300 } 301 302 #else /* IMAGE_BL2 */ 303 /* Functions for BL31 */ 304 /plat/nxp/soc-lx2160a/soc.c: 409 in soc_mem_access() 403 tzc400_reg_list); 404 mem_access_setup(NXP_TZC3_ADDR, index, 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) { 408 INFO("DDR Controller 2.\n");
CID 491153: (UNINIT) Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup".
409 mem_access_setup(NXP_TZC2_ADDR, index, 410 tzc400_reg_list); 411 mem_access_setup(NXP_TZC4_ADDR, index, 412 tzc400_reg_list); 413 } 414 } /plat/nxp/soc-lx2160a/soc.c: 411 in soc_mem_access() 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) { 408 INFO("DDR Controller 2.\n"); 409 mem_access_setup(NXP_TZC2_ADDR, index, 410 tzc400_reg_list);
CID 491153: (UNINIT) Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup".
411 mem_access_setup(NXP_TZC4_ADDR, index, 412 tzc400_reg_list); 413 } 414 } 415 416 #else /plat/nxp/soc-ls1088a/soc.c: 222 in soc_mem_access() 216 dram_idx, index, 217 info_dram_regions->region[dram_idx].addr, 218 info_dram_regions->region[dram_idx].size, 219 NXP_SECURE_DRAM_SIZE, NXP_SP_SHRD_DRAM_SIZE); 220 } 221
CID 491153: (UNINIT) Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup".
222 mem_access_setup(NXP_TZC_ADDR, index, 223 tzc400_reg_list); 224 } 225 226 /* 227 * This function implements soc specific erratum /plat/nxp/soc-lx2160a/soc.c: 404 in soc_mem_access() 398 } 399 400 if (devdisr5_info->ddrc1_present != 0) { 401 INFO("DDR Controller 1.\n"); 402 mem_access_setup(NXP_TZC_ADDR, index, 403 tzc400_reg_list);
CID 491153: (UNINIT) Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup".
404 mem_access_setup(NXP_TZC3_ADDR, index, 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) { 408 INFO("DDR Controller 2.\n"); 409 mem_access_setup(NXP_TZC2_ADDR, index, /plat/nxp/soc-lx2160a/soc.c: 402 in soc_mem_access() 396 info_dram_regions->region[dram_idx].size, 397 NXP_SECURE_DRAM_SIZE, NXP_SP_SHRD_DRAM_SIZE); 398 } 399 400 if (devdisr5_info->ddrc1_present != 0) { 401 INFO("DDR Controller 1.\n");
CID 491153: (UNINIT) Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup".
402 mem_access_setup(NXP_TZC_ADDR, index, 403 tzc400_reg_list); 404 mem_access_setup(NXP_TZC3_ADDR, index, 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) {
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