Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/116/
Failed Jobs: AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://ci.trustedfirmware.org/job/tf-m-build-config/164396/ AN524_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164397/ MUSCA_B1_GCC_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/164401/ corstone315_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164403/ AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_NSCE https://ci.trustedfirmware.org/job/tf-m-build-config/164411/ AN524_GCC_2_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164426/ b_u585i_iot02a_ARMCLANG_1_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164430/ AN519_GCC_1_Release_BL2_SMALL_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/164431/ RSE_RDV3R1_GCC_1_Release_BL2_NSOFF_CFG0 https://ci.trustedfirmware.org/job/tf-m-build-config/164433/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164434/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164437/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/164438/ AN521_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/164441/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164442/ AN524_ARMCLANG_2_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164443/ RSE_TC4_GCC_2_RegS_RegNS_Release_BL2_RSE_PROVISIONING_SYMMETRIC https://ci.trustedfirmware.org/job/tf-m-build-config/164444/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPOFF https://ci.trustedfirmware.org/job/tf-m-build-config/164445/ AN519_GCC_1_Debug_BL2_IPC https://ci.trustedfirmware.org/job/tf-m-build-config/164446/ AN519_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC https://ci.trustedfirmware.org/job/tf-m-build-config/164448/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/164471/ AN521_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164472/ AN521_GCC_2_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164473/ AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/164475/ MUSCA_B1_GCC_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/164484/ AN521_GCC_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/164485/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164487/ AN521_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/164491/ RSE_TC4_GCC_2_Debug_BL2_ATTESTATION_SCHEME_DPE https://ci.trustedfirmware.org/job/tf-m-build-config/164492/ AN521_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_SMALL_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/164494/ MUSCA_B1_ARMCLANG_3_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164499/ corstone1000_GCC_1_RegS_Debug_BL2_NSOFF_CS1K_TEST_FPGA https://ci.trustedfirmware.org/job/tf-m-build-config/164506/ AN519_GCC_2_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164513/ AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPOFF https://ci.trustedfirmware.org/job/tf-m-build-config/164514/ AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_NSCE https://ci.trustedfirmware.org/job/tf-m-build-config/164557/ AN519_GCC_2_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164570/ corstone1000_GCC_2_RegS_Release_BL2_NSOFF_CS1K_TEST_FPGA https://ci.trustedfirmware.org/job/tf-m-build-config/164573/ RSE_TC4_GCC_1_Release_BL2_ATTESTATION_SCHEME_DPE https://ci.trustedfirmware.org/job/tf-m-build-config/164575/ AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/164577/ AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164578/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/164581/ MUSCA_B1_GCC_2_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164583/ AN524_GCC_1_RegBL2_RegS_RegNS_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/164586/ AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MMIO https://ci.trustedfirmware.org/job/tf-m-build-config/164587/ AN519_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_SMALL_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/164590/ AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/164449/
For detailed build results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/116/artifact/build_results.c... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.