Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/321/
Failed Jobs: MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/466709/ AN521_ARMCLANG_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/466837/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/466845/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/466851/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/466979/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/467000/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/467021/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/467027/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/467069/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/467075/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/467132/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/467142/ MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/467207/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/467209/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/467296/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/466930/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/467115/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/467235/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/467247/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/467256/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/467389/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/467402/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/467411/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/467413/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/467428/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC https://ci.trustedfirmware.org/job/tf-m-build-config/467429/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/467445/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/467446/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/467463/
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