Check console output at http://ci.trustedfirmware.org/job/tf-m-nightly/1765/

Failed Jobs: MUSCA_B1_GCC_1_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2466265 MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2466266 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2466267 MUSCA_B1_ARMCLANG_3_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2466268 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2466269 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2466270 MUSCA_B1_ARMCLANG_2_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2466271 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2466272 MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2466273 MUSCA_B1_GCC_1_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2466274 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA https://tf.validation.linaro.org/scheduler/job/2466275 MUSCA_B1_GCC_2_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2466276 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2466280 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2466277 MUSCA_B1_ARMCLANG_1_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2466278 MUSCA_B1_ARMCLANG_1_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2466281 MUSCA_B1_GCC_1_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2466282 MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2466283 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2466284 MUSCA_B1_ARMCLANG_2_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2466285 MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2466286 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2466287 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2466288 MUSCA_B1_ARMCLANG_3_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2466289 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2466290 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2466291 MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2466292 MUSCA_B1_GCC_1_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2466293 MUSCA_B1_GCC_2_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2466294 MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2466295 MUSCA_B1_GCC_3_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2466296 MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2466297

For detailed test results please refer to http://ci.trustedfirmware.org/job/tf-m-nightly/1765/artifact/test_results.cs...