Check console output at http://ci.trustedfirmware.org/job/tf-m-nightly/1914/

Failed Jobs: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2562651 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2562652 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2562653 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2562654 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2562655 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA https://tf.validation.linaro.org/scheduler/job/2562656 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2562657 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2562658 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2562659 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2562660 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2562661 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2562662 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2562663 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2562665 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2562666 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2562664 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2562667 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2562668 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2562669 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2562670 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2562672 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2562673 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2562674 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2562671 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2562676 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2562677 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2562678 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2562675

For detailed test results please refer to http://ci.trustedfirmware.org/job/tf-m-nightly/1914/artifact/test_results.cs...