Hello, I am currently developing with the Multi-RSE Topology and have an
inquiry regarding the following
*1. Overview & Environment*
-
*Version:* Trusted Firmware-M (TF-M) 2.2.2
-
*Target Architecture:* MULTI_RSE_TOPOLOGY enabled environment
-
*Related Modules:* boot_hal_bl1_2.c, rse_handshake.c
*2. Background & Code Analysis* We are currently analyzing the BL1 boot
sequence code to set up a Multi-RSE environment. Looking at the
boot_platform_post_init() function in
platform/ext/target/arm/rse/common/bl1/boot_hal_bl1_2.c, the vHUK is
generated in the following sequence:
1.
Calls rse_derive_vhuk_seed()
2.
Checks the CM_POLICIES_VHUK_AGREEMENT_REQUIRED policy, then executes
rse_handshake(vhuk_seed)
3.
Calls rse_setup_vhuk() to derive the final vHUK based on the aggregated
Seed array.
*3. Issue Description* However, upon analyzing the operational structure in
rse_handshake.c, we suspect a synchronization defect exists where the
Server (Primary RSE) and multiple Clients (Secondary RSEs) will end up
generating different final vHUKs.
-
Looking at the rse_handshake_server() logic, the server replies to the
client *immediately* within the receive loop with the *currently*
aggregated vhuk_seeds_buf every time it receives a Seed from a client.
-
Because of this behavior, Client 1 (the first to connect) receives an
incomplete array (e.g., [C0, C1, 0, 0]) that lacks the seeds of
subsequent clients. Only the last client to connect receives the fully
populated array ([C0, C1, C2, C3]).
-
Consequently, each Client executes rse_setup_vhuk() with a different
state of vhuk_seeds_buf. This ultimately leads to mismatched final vHUK
values across the RSEs within the system.
*4. Questions*
1.
Is this behavior (returning an incomplete Seed array based on the client
connection order) an intended operation within the security architecture?
2.
If this is not intended, is this a known bug in TF-M 2.2.2 where the
logic for the Server to broadcast (or perform a 2-Phase synchronization of)
the completed array to all clients *after* gathering all seeds is
missing?
3.
Could you please provide a workaround for this issue, or guide us to a
specific patch/commit if this has been resolved in a newer version?
Thank you in advance for your support.
On 17 March 2026 Mogens Lund (mogens.lund(a)prevas.dk) asked on this
list whether STM32H563 TF-M support was planned, and whether there
was a defined path for upstreaming a clone-and-adapt of the existing
STM32H573I-DK port. This patchset provides that support: it extends
the shared platform/ext/target/stm/common/stm32h5xx/ code to cover
STM32H563 alongside STM32H573 and adds a NUCLEO-H563ZI board port
that builds and runs on real hardware today.
Twenty patches, internally organised into three groups that review
independently:
Group A [01..13] Generic STM32H5xx improvements. Every patch in
this group changes STM32H573 runtime behaviour
(correctness fixes, defensive hardenings,
chip-family additions applicable to both H563
and H573). No #ifdef guards.
Group B [14..19] STM32H563 chip-variant support. Four commits
(14-17) are mechanical enablers -- linkage
changes and defensive conditionals that are
no-ops on H573 but required by group C. Two
commits (18-19) are H563-only behaviour under
#ifdef STM32H563xx; H573 is unaffected.
Group C [20] NUCLEO-H563ZI board port at
platform/ext/target/stm/nucleo_h563zi/,
structurally mirroring the existing
platform/ext/target/stm/stm32h573i_dk/ port.
Thirteen of nineteen files are verbatim copies
from stm32h573i_dk with original headers
preserved; five contain authored content
(CMakeLists.txt, cpuarch.cmake, include/board.h,
include/stm32hal.h, secure/low_level_device.c);
one (cpuarch.cmake) is adapted from stm32h573i_dk
with a one-word chip-identifier change. See the
commit body for the full file-by-file provenance.
Group A patches
---------------
01 fix dual-bank flash page addressing
02 wait for HSI48 ready before RNG init
03 map fault vectors to proper handlers
04 improve Error_Handler debug spin
05 extend system-memory SAU region to cover UID
(H573 also gains NS UID access; RM0481 section
"Unique device ID register")
06 add SAU region for OCTOSPI1 XIP aperture
07 enable SRAMx clocks before MPCBB programming
(RM0481 section "RCC_AHB2ENR" -- SRAM2EN / SRAM3EN default
to 0 on reset)
08 allow NS access to I/DCACHE register interfaces
09 guard SysTick init in UART stdio driver
10 default CONFIG_TFM_ENABLE_CP10CP11 ON for stm32h573i_dk
(matches platform/ext/target/adi/max32657/cpuarch.cmake
precedent; docs/integration_guide/tfm_fpu_support.rst
section "FPU support")
11 enable configurable fault handlers in boundary setup
12 lock Secure MPU configuration after setup
13 refresh SystemCoreClock before RNG_Init
Group B patches
---------------
14 expose mpu_init() for platform overrides
(linkage only -- drops 'static'; no runtime change)
15 drop static from n_configured_regions
(same rationale as 14)
16 skip scratch flash area when it is not defined
(conditional on FLASH_AREA_SCRATCH_OFFSET; H573's
flash_layout defines it so H573 behaviour is unchanged)
17 clear AIRCR.BFHFNMINS defensively in boundary setup
(no-op on H573 because Reset_Handler's LOCKSVTAIRCR lock
stuck; documented mechanism for parts where it did not)
18 skip LOCKSVTAIRCR check for H563
(#ifdef STM32H563xx -- parts with BOOTHDPL = 0x01 boot at
HDPL1 so the lock write is silently ignored; self-retiring
when production parts ship with BOOTHDPL = 0x00)
19 skip PKA / AES / SAES TZSC config on H563
(#ifdef STM32H563xx -- H563 has none of those peripherals)
Group C patch
-------------
20 add NUCLEO-H563ZI board port
Dependency on STMicroelectronics' cmsis-device-h5
-------------------------------------------------
Group C compiles cleanly against the TF-M tree only after the
STM32H563 CMSIS device header has been imported. The canonical
source is
https://github.com/STMicroelectronics/cmsis-device-h5
at the latest stable tag (v1.5.0 at the time of writing). The
required imports are:
1. Add
platform/ext/target/stm/common/stm32h5xx/Device/Include/stm32h563xx.h
copied verbatim from the cmsis-device-h5 repository above.
2. Extend
platform/ext/target/stm/common/stm32h5xx/Device/Include/stm32h5xx.h
with an #elif defined(STM32H563xx) branch that #includes
"stm32h563xx.h", mirroring the existing #if defined(STM32H573xx)
branch.
Neither change is included in this patchset because groups A and B
touch zero H563-specific register symbols -- every patch tests only
the STM32H563xx build macro. I would appreciate guidance from ST
on whether they would like to handle the vendor import themselves
(same mechanism as the existing stm32h573xx.h), or whether they
would prefer a follow-up patch from me that does the import.
Testing
-------
All 20 patches applied together and boot-tested on NUCLEO-H563ZI
hardware with a Zephyr 4.4 NSPE (CONFIG_FPU=y,
thumbv8m.main-none-eabihf): BL2 -> TF-M SPE at isolation level 2 ->
Zephyr NSPE hands off cleanly, zero SecureFault / HardFault /
MemManage / BusFault. NS FPU access works across the S/NS
boundary via the SPM-level CP10/CP11 programming enabled by the
nucleo_h563zi cpuarch.cmake.
I do not have an STM32H573I-DK board. Group A is expected to be
strictly behaviour-improving on H573 (correctness fixes, defensive
hardenings, plus patch 10 which enables a cmake knob that the
stm32h573i_dk port today leaves off), but confirmation from ST or
other H573 users during review would be welcome.
--
STEVEN FRIEDMAN
SENIOR STAFF ENGINEER
*P:* 301.298.7997x168
*E:* friedman(a)ionq.co
*W: *www.ionq.co
Dear TF-M maintainers,
I am currently developing an application using the STM board b_u585i-iot02a (target: b_u585i_iot02a/stm32u585xx/ns). As mentioned in this issue<https://github.com/zephyrproject-rtos/zephyr/issues/92670>, , the provisioning data is currently statically programmed.
Instead of changing this hardcoded data directly, I created a jinja2 template and a generation script based on the original file. This follows the same pattern used in trusted-firmware-m/platform/ext/common/provisioning_bundle/CMakeLists.txt.
This approach works well locally, but I would like some feedback to ensure it meets the project's standards before opening a PR.
First, what are your thoughts on this method? Should this feature be made available for all STM boards, or is it better to restrict it to the b_u585i-iot02a for now?
Additionally, I am currently passing variables such as huk, iak, and boot_seed from my local project's CMakeLists.txt. If they are not provided, the script simply falls back to the default hardcoded values.
Thank you in advance for your time and guidance.
Best regards,
———
Benjamin Grolleau
benjamin.grolleau(a)outlook.com
Hello,
TF-M CI is currently failing in most builds due to a documentation issue. The documentation was recently upgraded and now requires additional Python components in Docker image.
We are aware of the issue and are working on fixes.
Best regards,
Anton
Hi all,
Currently TFM specifies -fshort-wchar and -fshort-enums
There previously was a discussion about this in https://lists.trustedfirmware.org/archives/list/tf-m@lists.trustedfirmware.…
The decision was to remove these flags – which was done in https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/6186
But then fix was reverted in https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/6349 because:
Removing the -fshort-wchar flag will cause link error with
RTX library while using armclang and debug mode.
Now we faced same issue when linking some of our prebuilt crypto libraries.
Since RTX libraries ware prebuilt by TFM maintainers (prebuilt RTX libs are not part of CMSIS RTX) – I believe it is better to rebuild them without -fshort-wchar and -fshort-enums and remove these flags in TFM.
Does TFM team still have a possibility to rebuild these RTX libs? Does this change make sense to TFM community?
Best regards,
Bohdan Hunko
Cypress Semiconductor Ukraine LLC
Senior Engineer
CSS ICW SW INT BFS SFW
Mobile: +380995019714
Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>
Hi Everyone,
I am glad to announce the new maintainer of TF-M project:
* Nicola Mazzucato aka nicola-mazzucato-arm <nicola.mazzucato(a)arm.com<mailto:nicola.mazzucato@arm.com>>
Thank you, Nicola, for agreeing to maintain the project.
All the best,
Anton
Hello,
I am thrilled to announce the support of new Clan/LLVM toolchain, freely available here: https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm. This extends a suite of powerful tools designed to enhance your development experience and boost productivity.
Key Features:
* Offers Clang frontend
* Available for Linux, Windows and macOS
* Builds TF-M binaries for all Arm targets
* Secure side built without libc and picolib libraries, while both are available to Bootloader and Non-Secure side
Important notes:
* Floating point support is not verified
* MVE is not supported yet
* This has been verified with version v18.1.3 of the toolchain.
We're excited for you to try out the new toolchain support and look forward to your feedback. The use of the toolchain_CLANG.cmake is the same as all other toolchains.
I plan to present the new toolchain and compare it with the existing tools in one of the upcoming TF-M forums. Meanwhile I encourage the platform owners to include the new toolchain support using arm platforms as a reference. The relevant changes are in this chain:
https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/34351
There is ongoing discussion on the best name for the toolchain to avoid possible confusion. Should it be Clang as now, LLVM, or even LLVMClang? Please share your opinion.
Thanks, and best regards,
Anton.
Hi All,
I se that http://ci.trustedfirmware.org/job/tf-m-static-checks/3233/consoleFull has FAILURE in the log, but the job passed:
Include order test: FAILURE (warning)
Additionally there are some other errors – a suspect that they may lead to this weird behavior:
22:23:00 + ./tf-m-ci-scripts/jenkins/verify.py --category static --value 1 --verify-name static-checks --user ****
22:23:01 Error posting to verify-status: 404
22:23:01 Not found: verify-status~verifications
22:23:01
22:23:01 Could not check if verify-status plugin is installed
Is this expected?
Best regards,
Bohdan Hunko
Cypress Semiconductor Ukraine LLC
Senior Engineer
CSS ICW SW INT BFS SFW
Mobile: +380995019714
Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>