From: Marouene Boubakri marouene.boubakri@oss.nxp.com
optee_check_mem_type() only lets normal cacheable memory be registered with secure world since OP-TEE maps registered pages as such and must not observe mismatched memory attributes.
On RISC-V the memory type of a mapping is encoded in the Svpbmt bits of the PTE (or their T-Head equivalent selected at runtime by the _PAGE_MTMASK alternative): normal cacheable memory (PMA) has them cleared, pgprot_writecombine() and pgprot_noncached() set them. Without Svpbmt the memory type is defined by the PMAs alone, _PAGE_MTMASK is empty and every mapping passes the check, as there is nothing else to inspect.
Signed-off-by: Marouene Boubakri marouene.boubakri@oss.nxp.com --- drivers/tee/optee/call.c | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/drivers/tee/optee/call.c b/drivers/tee/optee/call.c index e046aff61..c29bff224 100644 --- a/drivers/tee/optee/call.c +++ b/drivers/tee/optee/call.c @@ -604,6 +604,14 @@ static bool is_normal_memory(pgprot_t p) #elif defined(CONFIG_ARM64) return ((pgprot_val(p) & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL)) || ((pgprot_val(p) & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL_TAGGED)); +#elif defined(CONFIG_RISCV) + /* + * Svpbmt, or the T-Head equivalent, encodes non-cacheable and I/O + * memory in the memory type bits of the PTE, normal cacheable memory + * (PMA) has them cleared. Without Svpbmt the memory type only comes + * from the PMAs, the mask is empty and all mappings pass the check. + */ + return !(pgprot_val(p) & _PAGE_MTMASK); #else #error "Unsupported architecture" #endif