- TF-A - lists.trustedfirmware.org

documentation - secure interrupt handling in EL3 for arm gic v2

by Nagal, Amit

Hi , There is a contradiction present in TF-A documentation whether secure interrupts can be handled in EL3 for arm gic v2 case . 1. Referring https://trustedfirmware-a.readthedocs.io/en/latest/design/interrupt-framewo… It says secure interrupts can't be handled in EL3 . Refer statement : "In Arm GICv2, all secure interrupts are assumed to be handled in Secure-EL1. They can be delivered to Secure-EL1 via EL3 but they cannot be handled in EL3." 2. Referring https://trustedfirmware-a.readthedocs.io/en/latest/components/platform-inte… It says secure interrupts can be handled in EL3 , When GICV2_G0_FOR_EL3 is 1 . Refer below statements : For interrupt type INTR_TYPE_EL3: When GICV2_G0_FOR_EL3 is 0, it returns false, indicating no support for EL3 interrupts. When GICV2_G0_FOR_EL3 is 1, it returns true, indicating support for EL3 interrupts. can this be clarified ? Regards Amit

2 years

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Trusted Firmware-A LTS v2.8.19 Release Announcement

by ci_notify＠trustedfirmware.org

Hello, Trusted Firmware-A LTS version 2.8.19 is now available. This release contains the following patches. 1e785ab6a feat(spmd): initialize SCR_EL3.EEL2 bit at RESET [1] 9d40eff24 fix(spmd): avoid restoring ctx during first entry into spmc [2] 02633263a fix(cpus): workaround for Cortex-A715 erratum 2728106 [3] 9b5d75b17 fix(cpus): workaround for Cortex-X4 erratum 2740089 [4] d0a74e38c fix(cpus): workaround for Cortex-X4 erratum 2763018 [5] 6c9135fb0 docs: decrease the minimum supported OpenSSL [6] [1] https://review.trustedfirmware.org/q/Ia246235aa8d8004dcaf845f21c8aeeabbbbbe… [2] https://review.trustedfirmware.org/q/I368088ece60826fd7a6aa423ba584a89d32fc… [3] https://review.trustedfirmware.org/q/Ic825f9942e7eb13893fdbb44a2090b897758c… [4] https://review.trustedfirmware.org/q/I1d0fa4dd383437044a4467591f65a4a8514ca… [5] https://review.trustedfirmware.org/q/Ia188e08c2eb2952923ec72e2a56efdeea836f… [6] https://review.trustedfirmware.org/q/I5c60907337f10b05d5c43b0384247c5d4135d… Thanks, TF-A LTS team

2 years

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Canceled event with note: TF-A Tech Forum @ Thu May 16, 2024 5pm - 6pm (GMT+2) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Hi, Cancelling as no topic proposed this week. Thanks & Regards, Olivier. " TF-A Tech Forum Thursday May 16, 2024 ⋅ 5pm – 6pm Central European Time - Paris We run an open technical forum call for anyone to participate and it is not restricted to Trusted Firmware project members. It will operate under the guidance of the TF TSC. Feel free to forward this invite to colleagues. Invites are via the TF-A mailing list and also published on the Trusted Firmware website. Details are here: https://www.trustedfirmware.org/meetings/tf-a-technical-forum/Trusted Firmware is inviting you to a scheduled Zoom meeting.Join Zoom Meetinghttps://linaro-org.zoom.us/my/trustedfirmware?pwd=VktXcm5MNUUyVVM4R0k3ZUtvdU84QT09 One tap mobile+16465588656,,9159704974# US (New York)+16699009128,,9159704974# US (San Jose)Dial by your location +1 646 558 8656 US (New York) +1 669 900 9128 US (San Jose) 877 853 5247 US Toll-free 888 788 0099 US Toll-freeMeeting ID: 915 970 4974Find your local number: https://zoom.us/u/ad27hc6t7h Guests marek.bykowski(a)gmail.com okash.khawaja(a)gmail.com tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. To stop receiving future updates for this event, decline this event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

2 years

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Firmware-A v2.10 release code freeze notification

by Olivier Deprez

Hi All, The next release of the Firmware-A bundle of projects tagged v2.10 has an expected code freeze date of Nov, 7th 2023. Refer to the Release Cadence section from TF-A documentation (https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/docs/about…). Closing out the release takes around 6-10 working days after the code freeze. Preparations tasks for v2.10 release should start in coming month. We want to ensure that planned feature patches for the release are submitted in good time for the review process to conclude. As a kind recommendation and a matter of sharing CI resources, please launch CI jobs with care e.g.: -For simple platform, docs changes, or one liners, use Allow-CI+1 label (no need for a full Allow-CI+2 run). -For large patch stacks use Allow-CI+2 at top of the patch stack (and if required few individual Allow+CI+1 in the middle of the patch stack). -Carefully analyze results and fix the change if required, before launching new jobs on the same change. -If after issuing a Allow-CI+1 or Allow-CI+2 label a Build start notice is not added as a gerrit comment on the patch right away please be patient as under heavy load CI jobs can be queued and in extreme conditions it can be over an hour before the Build start notice is issued. Issuing another Allow-CI+1 or Allow-CI+2 label will just result in an additional job being queued. Thanks & Regards, Olivier.

2 years

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FAULT_INJECTION_SUPPORT - FIEN bit

by Nagal, Amit

Hi, Referring https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/getti… it says : ``FAULT_INJECTION_SUPPORT``: ARMv8.4 extensions introduced support for fault injection from lower Els. Referring https://github.com/ARM-software/arm-trusted-firmware/blob/master/lib/el3_ru… FAULT_INJECTION_SUPPORT enables FIEN bit. #if FAULT_INJECTION_SUPPORT /* Enable fault injection from lower ELs */ scr_el3 |= SCR_FIEN_BIT; #endif Question : 1. Do we have any relevant documentation from arm which specifies FIEN bit can be enabled from armv8.4 ? 2. In cortex a-53 technical reference manual, SCR_EL3 does not have FIEN bit , bit 21 is marked reserved . In cortex a-78 technical reference manual , manual does not have details for SCR_EL3 . I want to know whether on Armv8.2-a based cores like cortex a-78 , is the FIEN bit field marked reserved in SCR_EL3 register or is available functionality wise as in armv8.4 ? Please help with above query. Regards Amit

2 years

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 2 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 14 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 2 of 2 defect(s) ** CID 425813: Memory - corruptions (OVERRUN) /drivers/arm/css/dsu/dsu.c: 133 in cluster_on_dsu_pmu_context_restore() ________________________________________________________________________________________________________ *** CID 425813: Memory - corruptions (OVERRUN) /drivers/arm/css/dsu/dsu.c: 133 in cluster_on_dsu_pmu_context_restore() 127 void cluster_on_dsu_pmu_context_restore(void) 128 { 129 unsigned int cluster_pos; 130 131 cluster_pos = (unsigned int) plat_cluster_id_by_mpidr(read_mpidr_el1()); 132 >>> CID 425813: Memory - corruptions (OVERRUN) >>> "&cluster_pmu_context[cluster_pos]" evaluates to an address that is at byte offset 138720 of an array of 544 bytes. 133 restore_dsu_pmu_state(&cluster_pmu_context[cluster_pos]); ** CID 425812: Memory - corruptions (OVERRUN) /drivers/arm/css/dsu/dsu.c: 81 in cluster_off_dsu_pmu_context_save() ________________________________________________________________________________________________________ *** CID 425812: Memory - corruptions (OVERRUN) /drivers/arm/css/dsu/dsu.c: 81 in cluster_off_dsu_pmu_context_save() 75 void cluster_off_dsu_pmu_context_save(void) 76 { 77 unsigned int cluster_pos; 78 79 cluster_pos = (unsigned int) plat_cluster_id_by_mpidr(read_mpidr_el1()); 80 >>> CID 425812: Memory - corruptions (OVERRUN) >>> "&cluster_pmu_context[cluster_pos]" evaluates to an address that is at byte offset 138720 of an array of 544 bytes. 81 save_dsu_pmu_state(&cluster_pmu_context[cluster_pos]); 82 } 83 84 /***************************************************************************** 85 * This function, restore_dsu_pmu_state, restores the state of the 86 * Performance Monitoring Unit (PMU) from a previously saved state. ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=u001.AxU2LYlgjL6eX23u9ErQy-2…

2 years

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 8 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 425810: High impact quality (WRITE_CONST_FIELD) /plat/nxp/s32/s32g274ardb2/plat_console.c: 17 in console_s32g2_register() ________________________________________________________________________________________________________ *** CID 425810: High impact quality (WRITE_CONST_FIELD) /plat/nxp/s32/s32g274ardb2/plat_console.c: 17 in console_s32g2_register() 11 12 void console_s32g2_register(void) 13 { 14 static console_t s32g2_console; 15 int ret; 16 >>> CID 425810: High impact quality (WRITE_CONST_FIELD) >>> A write to an aggregate overwrites a const-qualified field within the aggregate. 17 (void)memset(&s32g2_console, 0, sizeof(s32g2_console)); 18 19 ret = console_linflex_register(UART_BASE, UART_CLOCK_HZ, 20 UART_BAUDRATE, &s32g2_console); 21 if (ret == 0) { 22 panic(); ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=u001.AxU2LYlgjL6eX23u9ErQy-2…

2 years

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 7 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 14 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 7 of 7 defect(s) ** CID 425803: Control flow issues (DEADCODE) /mbedtls/library/psa_crypto_aead.c: 314 in mbedtls_psa_aead_decrypt() ________________________________________________________________________________________________________ *** CID 425803: Control flow issues (DEADCODE) /mbedtls/library/psa_crypto_aead.c: 314 in mbedtls_psa_aead_decrypt() 308 } 309 310 exit: 311 mbedtls_psa_aead_abort(&operation); 312 313 if (status == PSA_SUCCESS) { >>> CID 425803: Control flow issues (DEADCODE) >>> Execution cannot reach this statement: "*plaintext_length = ciphert...". 314 *plaintext_length = ciphertext_length - operation.tag_length; 315 } 316 return status; 317 } 318 319 /* Set the key and algorithm for a multipart authenticated encryption ** CID 425802: Control flow issues (DEADCODE) /mbedtls/library/x509_crt.c: 2750 in x509_inet_pton_ipv6() ________________________________________________________________________________________________________ *** CID 425802: Control flow issues (DEADCODE) /mbedtls/library/x509_crt.c: 2750 in x509_inet_pton_ipv6() 2744 MBEDTLS_PUT_UINT16_BE(group, addr, nonzero_groups); 2745 nonzero_groups++; 2746 if (*p == '\0') { 2747 break; 2748 } else if (*p == '.') { 2749 /* Don't accept IPv4 too early or late */ >>> CID 425802: Control flow issues (DEADCODE) >>> Execution cannot reach the expression "zero_group_start == -1" inside this statement: "if ((nonzero_groups == 0 &&...". 2750 if ((nonzero_groups == 0 && zero_group_start == -1) || 2751 nonzero_groups >= 7) { 2752 break; 2753 } 2754 2755 /* Walk back to prior ':', then parse as IPv4-mapped */ ** CID 425801: Control flow issues (UNREACHABLE) /mbedtls/library/psa_crypto_aead.c: 306 in mbedtls_psa_aead_decrypt() ________________________________________________________________________________________________________ *** CID 425801: Control flow issues (UNREACHABLE) /mbedtls/library/psa_crypto_aead.c: 306 in mbedtls_psa_aead_decrypt() 300 (void) additional_data; 301 (void) additional_data_length; 302 (void) plaintext; 303 return PSA_ERROR_NOT_SUPPORTED; 304 } 305 >>> CID 425801: Control flow issues (UNREACHABLE) >>> This code cannot be reached: "if (status == 0) { *plain...". 306 if (status == PSA_SUCCESS) { 307 *plaintext_length = ciphertext_length - operation.tag_length; 308 } 309 310 exit: 311 mbedtls_psa_aead_abort(&operation); ** CID 425800: Control flow issues (UNREACHABLE) /mbedtls/library/psa_crypto_aead.c: 612 in mbedtls_psa_aead_finish() ________________________________________________________________________________________________________ *** CID 425800: Control flow issues (UNREACHABLE) /mbedtls/library/psa_crypto_aead.c: 612 in mbedtls_psa_aead_finish() 606 (void) tag_size; 607 (void) tag_length; 608 609 return PSA_ERROR_NOT_SUPPORTED; 610 } 611 >>> CID 425800: Control flow issues (UNREACHABLE) >>> This code cannot be reached: "if (status == 0) { *ciphe...". 612 if (status == PSA_SUCCESS) { 613 /* This will be zero for all supported algorithms currently, but left 614 * here for future support. */ 615 *ciphertext_length = finish_output_size; 616 *tag_length = operation->tag_length; 617 } ** CID 425799: Control flow issues (UNREACHABLE) /mbedtls/library/psa_crypto_aead.c: 110 in psa_aead_setup() ________________________________________________________________________________________________________ *** CID 425799: Control flow issues (UNREACHABLE) /mbedtls/library/psa_crypto_aead.c: 110 in psa_aead_setup() 104 default: 105 (void) status; 106 (void) key_buffer; 107 return PSA_ERROR_NOT_SUPPORTED; 108 } 109 >>> CID 425799: Control flow issues (UNREACHABLE) >>> This code cannot be reached: "operation->key_type = psa_g...". 110 operation->key_type = psa_get_key_type(attributes); 111 112 operation->tag_length = PSA_ALG_AEAD_GET_TAG_LENGTH(alg); 113 114 return PSA_SUCCESS; 115 } ** CID 425798: Control flow issues (UNREACHABLE) /mbedtls/library/psa_crypto_aead.c: 541 in mbedtls_psa_aead_update() ________________________________________________________________________________________________________ *** CID 425798: Control flow issues (UNREACHABLE) /mbedtls/library/psa_crypto_aead.c: 541 in mbedtls_psa_aead_update() 535 (void) output; 536 (void) output_size; 537 538 return PSA_ERROR_NOT_SUPPORTED; 539 } 540 >>> CID 425798: Control flow issues (UNREACHABLE) >>> This code cannot be reached: "if (status == 0) { *outpu...". 541 if (status == PSA_SUCCESS) { 542 *output_length = update_output_length; 543 } 544 545 return status; 546 } ** CID 425797: Control flow issues (UNREACHABLE) /mbedtls/library/psa_crypto_aead.c: 196 in mbedtls_psa_aead_encrypt() ________________________________________________________________________________________________________ *** CID 425797: Control flow issues (UNREACHABLE) /mbedtls/library/psa_crypto_aead.c: 196 in mbedtls_psa_aead_encrypt() 190 (void) additional_data; 191 (void) additional_data_length; 192 (void) plaintext; 193 return PSA_ERROR_NOT_SUPPORTED; 194 } 195 >>> CID 425797: Control flow issues (UNREACHABLE) >>> This code cannot be reached: "if (status == 0) { *ciphe...". 196 if (status == PSA_SUCCESS) { 197 *ciphertext_length = plaintext_length + operation.tag_length; 198 } 199 200 exit: 201 mbedtls_psa_aead_abort(&operation); ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=u001.AxU2LYlgjL6eX23u9ErQy-2…

2 years

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 425708: Null pointer dereferences (NULL_RETURNS) ________________________________________________________________________________________________________ *** CID 425708: Null pointer dereferences (NULL_RETURNS) /plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c: 279 in pm_self_suspend() 273 const struct pm_proc *proc = pm_get_proc(cpuid); 274 275 /* 276 * Do client specific suspend operations 277 * (e.g. set powerdown request bit) 278 */ >>> CID 425708: Null pointer dereferences (NULL_RETURNS) >>> Dereferencing a pointer that might be "NULL" "proc" when calling "pm_client_suspend". 279 pm_client_suspend(proc, state); 280 /* Send request to the PMU */ 281 PM_PACK_PAYLOAD6(payload, PM_SELF_SUSPEND, proc->node_id, latency, 282 state, address, (address >> 32)); 283 return pm_ipi_send_sync(proc, payload, NULL, 0); 284 } ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=u001.AxU2LYlgjL6eX23u9ErQy-2…

2 years

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TF-A Tech Forum : TF-RMM CPPCheck integration and TF-A-Tests testing

by Soby Mathew

Hi Everyone, This Thursday , Shruti from TF-RMM team will discuss the following topics in TF-A Tech Forum : 1. Integration of CPPCheck in TF-RMM * CPPCheck is an open-source static analyzer with addon MISRA checker. In this talk, we will discuss the CPPCheck integration in TF-RMM build system and demonstrate the same. 2. TF-A-Tests enhancements and testing for TF-RMM * Discuss new enhancements in TF-A-Tests for Realm Payload tests including Creating, Loading & Running Realm Payload, testing multiple Rec’s and PSCI support for Realms. We will also cover some Test framework conventions and aspects of Stage2 Memory Management, Realm Memory Exception Model testing. Best Regards Soby Mathew -----Original Appointment----- From: Trusted Firmware Public Meetings <linaro.org_havjv2figrh5egaiurb229pd8c(a)group.calendar.google.com> Sent: Thursday, February 22, 2024 10:13 PM To: Trusted Firmware Public Meetings; tf-a(a)lists.trustedfirmware.org; marek.bykowski(a)gmail.com; okash.khawaja(a)gmail.com Subject: TF-A Tech Forum When: 02 May 2024 16:00-17:00 Europe/London. Where: TF-A Tech Forum We run an open technical forum call for anyone to participate and it is not restricted to Trusted Firmware project members. It will operate under the guidance of the TF TSC. Feel free to forward this This event has been updated with a note: "Updating invite link" Changed: description Description CHANGED We run an open technical forum call for anyone to participate and it is not restricted to Trusted Firmware project members. It will operate under the guidance of the TF TSC. Feel free to forward this invite to colleagues. Invites are via the TF-A mailing list and also published on the Trusted Firmware website. Details are here: https://www.trustedfirmware.org/meetings/tf-a-technical-forum/<https://www.google.com/url?q=https%3A%2F%2Fwww.trustedfirmware.org%2Fmeetin…> Trusted Firmware is inviting you to a scheduled Zoom meeting. Join Zoom Meeting https://linaro-org.zoom.us/my/trustedfirmware?pwd=VktXcm5MNUUyVVM4R0k3ZUtvd…<https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fmy%2Ftruste…> One tap mobile +16465588656,,9159704974# US (New York) +16699009128,,9159704974# US (San Jose) Dial by your location +1 646 558 8656 US (New York) +1 669 900 9128 US (San Jose) 877 853 5247 US Toll-free 888 788 0099 US Toll-free Meeting ID: 915 970 4974 Find your local number: https://zoom.us/u/ad27hc6t7h<https://www.google.com/url?q=https%3A%2F%2Fzoom.us%2Fu%2Fad27hc6t7h&sa=D&us…> When Every 2 weeks from 9am to 10am on Thursday (Mountain Standard Time - Phoenix) Guests tf-a(a)lists.trustedfirmware.org<mailto:tf-a@lists.trustedfirmware.org> marek.bykowski(a)gmail.com<mailto:marek.bykowski@gmail.com> okash.khawaja(a)gmail.com<mailto:okash.khawaja@gmail.com> View all guest info<https://calendar.google.com/calendar/event?action=VIEW&eid=NWlub3Ewdm1tMmk1…> RSVP for tf-a(a)lists.trustedfirmware.org<mailto:tf-a@lists.trustedfirmware.org> for all events in this series Yes<https://calendar.google.com/calendar/event?action=RESPOND&eid=NWlub3Ewdm1tM…> No<https://calendar.google.com/calendar/event?action=RESPOND&eid=NWlub3Ewdm1tM…> Maybe<https://calendar.google.com/calendar/event?action=RESPOND&eid=NWlub3Ewdm1tM…> More options<https://calendar.google.com/calendar/event?action=VIEW&eid=NWlub3Ewdm1tMmk1…> Invitation from Google Calendar<https://calendar.google.com/calendar/> You are receiving this email because you are an attendee on the event. To stop receiving future updates for this event, decline this event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more<https://support.google.com/calendar/answer/37135#forwarding>

2 years

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